Course Description:
Microprocessors based systems are part of electronic design for variety of applications including consumer electronics, automotive, telecom, healthcare and military etc. The aim of this course is to introduce students to micro-architecture of RISC V microprocessor its instruction set architecture (ISA). Students will also design data path and control path of a single cycle processor.

Course Learning Outcomes:
CLO:1 Illustrate knowledge of Instruction set architecture and firmware writing for microprocessors using assembly and C language programming.
CLO:2 Use software tools like Venus and LogiSim for simulation testing and debugging of microprocessors.
CLO:3 Design and Implement of a RISC microprocessor and its Instruction Set Architecture (ISA).

Lab Experiments:
1. Introduction to Computer Architecture and Software Tools
2. Implementation of Arithmetic Logic Unit (ALU) in LogiSim
3. Implementation of RAM and ROM memory blocks in LogiSim
4. RISC-V assembly programming using Data Transfer and Arithmetic Instructions
5. RISC-V assembly programming using Logic and Jump instructions
6. Implementation of RISC-V assembler
7. Design of Single Cycle Processor Data path I
8. Design of Single Cycle Processor Data path II
9. Design of Single Cycle Processor Control-path
10. Integration of data and control path and Simulation of Single Cycle Processor
11. Pipelining of single cycle processor
12. Implementation of Cache memory hierarchy