- Define concepts in the design of microprocessor as state machine and designing its data path and its controller.
- Describe how the basic units of the Intel 8088 architecture work together to represent Integer Numbers, Floating Numbers and register representation inside the microprocessor.
- Implement assembly programs of intermediate complexity using the intel 8088 architecture. The student should also be able to convert intermediate complexity program in high level language into assembly code.
COURSE LEARNING OUTCOMES (CLO)
CLO: 1. Define concepts in the design of microprocessor as state machine and designing its data path and its controller.
CLO: 2. Describe how the basic units of the Intel 8088 architecture work together to represent Integer Numbers, Floating Numbers and register representation inside the microprocessor.
CLO: 3. Implement assembly programs of intermediate complexity using the intel 8088 architecture. The student should also be able to convert intermediate complexity program in high level language into assembly code.
- Introduction to computer organization & architecture, general introduction of the course Assembly and Machine language, compiler and assembler, why learn assembly, comparison of assembly and high-level language.
- Programmer’s view of a computer system, (App. Program, assembly language, operating system, instruction set architecture, microarchitecture, digital logic) Data representation, Binary numbers, converting binary to decimal, hexadecimal integers, hexadecimal to binary, decimal to hexadecimal, Integer storage sizes
- Binary addition, Hexadecimal addition, Signed Integers (sign-magnitude, Biased representation) Signed Integers (1’s complement, 2’s complement), Exercises, Dis advantages of signed magnitude.
- Excess representation, floating point representation, Summary of number representation 2’s complement of hexadecimal ranges of signed integers, carry and overflow, character storage, Printable ASCII Codes, control characters.
- Introduction to the IAPX88 architecture, registers (General Purpose, Pointer register, Segment register) The 88 flag register and interruption of flags ( ZF, CF, SF, OF, AF, PF, IF), Instruction groups (Data Movement, arithmetic and logic, control, special instructions)
- First assembly program, tools debugger, linker, assembler, how to assemble and run the assembly program Segmented memory model in IAPX88, using the debugger to explain the segmented memory model.
- Discussion on the Command file, List file, relative address and physical address. Offset, segment, physical address calculation, paragraph boundaries, overlapping segments
- Exercise questions from the notes Data declaration, difference between direct and in direct addressing, assembly programs showing different ways to represent data in the memory. Register addressing, memory addressing register to memory, memory to register, register to register, register to constant.
- Segments, default segments in direct and indirect modes, [base + offset + index] method to calculate the effective address and using it with the associated segment to calculate the physical address. Conditional Jumps, Flags and their role in decision making, Adding logic in assembly programs.
- Conditional Jumps , Interpretation of flags using conditional jumps, Unconditional Jumps, Bubble Sort, Short, Near, Far Jumps , Relative addressing, Questions from exercises, Relative, Addressing, Shift Instructions
- Bit manipulations, Shifting and rotation, SHR,SHL,SAR,SAL,ROR,ROL,RCL,RCR Register operations, Multiplication Algorithm, limitations in multiplication using MUL instruction Extended shift operations, Add with carry operation, subtract with carry Improvement on the Multiplication algorithm using extended shift and add operations, Masking operations Selective bit retrieval, selective bit set, selective bit inverse, selective bit not
- Subroutines using Stack introduction, Using Call, Ret instruction Parameter Passing in the stack and stack operations, Writing bubble sort code for generic implementation of the subroutines, Stack In Assembly Language, NASM Stack Pointer Register, Push And Pop In Stack Instructions
- Machine Instruction Cycle, Register Transfer Level Activity of machine instruction cycle, timing diagram of machine instruction cycle, Data Path architecture, data path architecture of the machine instruction cycle
- Data path control architecture hardwired; Firmware approach Data path control Continued
- Master Slave JK Flip Flop system firm ware approach, Master Slave JK Flip Flop System hardwired approach