One of the main goals of this course is to teach students the fundamental concepts in classical digital design and to demonstrate clearly the way in which digital circuits are designed and analyzed today. The purpose is to make students familiar with modern hierarchy of digital hardware and enlighten them the state-of-the-art computer hardware design methodologies. Moreover, the contents of the course provide students the basic idea of how to design and simulate logic circuits.


CLO:1. Identify and explain fundamental concepts of digital logic design including basic and universal gates, number systems, binary coded systems, basic components of combinational and sequential circuits (Level: C2)

CLO:2. Demonstrate the acquired knowledge to apply techniques related to the design and analysis of digital electronic circuits including Boolean algebra and multi-variable Karnaugh map methods (Level: C3)

CLO:3. Analyze small-scale combinational and sequential digital circuits (Level: C4)

CLO:4. Design small-scale combinational and synchronous sequential digital circuit using Boolean algebra and K-maps (Level: C5)


  1. Binary Systems – Four Lectures
    • Introduction
    • Number Systems and Conversions
    • Arithmetic with number systems
    • Signed and unsigned number systems and their arithmetic
    • Binary Codes
  2. Boolean Algebra & Logic Gates – Five Lectures
    • Boolean Postulates & Theorems
    • Boolean Functions and their Complements
    • Sum of Min Terms & Product of Max Terms
    • Standard forms & Canonical Forms
    • Digital logic gates
  3. Gate level Minimization – Six Lectures
    • Karnaugh maps
    • Multi-variable (2,3,4,5) K-maps
    • Don’t care conditions
    • Digital Circuits using Basic and Universal Gates
  4. Combinational Logic – Five Lectures
    • Analysis and Design
    • Code Converters
    • Adders & its types
    • Subtractors, Multiplier
    • Magnitude Comparator
    • Decoders and Encoders
    • Multiplexers
  5. Sequential Circuits – Six Lectures
    • Latches (SR Latch, D Latch)
    • Flip Flops ( D Flip Flop, JK Flip Flop, T Flip Flop)
    • Characteristic Tables, Characteristic Equations.
    • Design and Analysis of Clocked Sequential Circuits (State Equations, State Tables, State Diagrams)
    • Designing Counters
  6. Registers & Counters – Six Lectures
    • Simple registers
    • Registers with parallel Load
    • Shift Registers/Serial to parallel Convertors
    • Universal Shift Register
    • Asynchronous and Synchronous Counters
    • Ripple, Binary, BCD, & Johnson Counters